PRESS RELEASE
Silicon Interfaces announces portability for vertical/lateral reuse of Single Intent Test using PSS/DSL
- Silicon Valley, California, 28 Apr, 2023 9:00 am
Portable Stimulus is defined as "An Single Representation of Test Intent that is REUSABLE" by collection of constructs across different levels of integration and different execution platforms. The Accellera Portable Stimulus Standards (PSS) is a Methodology with declarative manner of Domain Specific Language (DSL) with three axes of portability - Vertical, Horizontal and Technique Reuse.
In line with the standards requirements and needs of the industry to ensure equivalence between outputs from all techniques, Silicon Interfaces has now demonstrated not only vertical reuse from IP to sub-system and SOC, but also effectively technique reuse from Simulation to Emulation with an Equivalence check.
Silicon Interfaces offers graph based portable stimulus description, declarative PSS conversion of UVM sequences, scheduling, complex activities and component grouping and a satisfaction guaranteed test intent realization.
Tuned to these services would be considerable automation in maximizing coverage goals and test cases for the embedded C, Emulation and Virtual Prototyping platforms.
Based on these techniques, Silicon Interfaces now has the industry's first PCie with capabilities of single intent test cases fully portable based on PSS across simulation and emulation and outputs are equivalent.
About Silicon Interfaces
Silicon Interfaces offers specialized semiconductors and microelectronics services for Low Power Designs, Portable Stimulus Standards (PSS) for Verification, Functional Safety Assurance and Fault Simulation, SystemC TLM, Verilog, SystemVerilog and UVM, EDA tools Product Support/Validation and EDA Infrastructure tools Development in Python/Php/Qt for customers in North America, Europe and Asia Pacific. Please visit
www.siliconinterfaces.com.
Silicon Interfaces is a powerhouse of Intellectual Property developed by its team of Engineers. These are owned and copyrighted by Silicon Interfaces and sold as Portfolio of IPs. Silicon Interfaces released effective 2002 a plethora of 14 IPs and consequently 6+ Verification IP across a broad spectrum. The Program is targeted to the Wireless and Wired Networking, Data Communications and Inter-connect areas, with extensions to Embedded and Storage areas. The program offers a Portfolio of Design IPs and has a program for Roadmap IPs.
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PRESS RELEASE
Silicon Interfaces announces portability for vertical/lateral reuse of Single Intent Test using PSS/DSL
- Silicon Valley, California, 28 Apr, 2023 9:00 am
Portable Stimulus is defined as "An Single Representation of Test Intent that is REUSABLE" by collection of constructs across different levels of integration and different execution platforms. The Accellera Portable Stimulus Standards (PSS) is a Methodology with declarative manner of Domain Specific Language (DSL) with three axes of portability - Vertical, Horizontal and Technique Reuse.
In line with the industry requirements, Silicon Interfaces has released a portfolio of services to alleviate the challenges of enhanced verification within time to market guidelines. To attain better control and achievement of test intent goals, reuse or portability of the test cases is of paramount importance from IPs to sub-systems to SOC, across design and protocols as well as for technique reuse.
Silicon Interfaces offers graph based portable stimulus description, declarative PSS conversion of UVM sequences, scheduling, complex activities and component grouping and a satisfaction guaranteed test intent realization.
Tuned to these services would be considerable automation in maximizing coverage goals and test cases for the embedded C, Emulation and Virtual Prototyping platforms.
Based on these techniques, Silicon Interfaces now has the industry's first SPI IP with capabilities of test cases with 100% coverage and fully portable based on PSS across all domains and currently are working on I2C with similar capabilities.
About Silicon Interfaces
Silicon Interfaces offers specialized semiconductors and microelectronics services for Low Power Designs, Portable Stimulus Standards (PSS) for Verification, Functional Safety Assurance and Fault Simulation, SystemC TLM, Verilog, SystemVerilog and UVM, EDA tools Product Support/Validation and EDA Infrastructure tools Development in Python/Php/Qt for customers in North America, Europe and Asia Pacific. Please visit
www.siliconinterfaces.com.
Silicon Interfaces is a powerhouse of Intellectual Property developed by its team of Engineers. These are owned and copyrighted by Silicon Interfaces and sold as Portfolio of IPs. Silicon Interfaces released effective 2002 a plethora of 14 IPs and consequently 6+ Verification IP across a broad spectrum. The Program is targeted to the Wireless and Wired Networking, Data Communications and Inter-connect areas, with extensions to Embedded and Storage areas. The program offers a Portfolio of Design IPs and has a program for Roadmap IPs.
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